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Cover image: Formal Semantics and Proof Techniques for Optimizing VHDL Models 9780792383758

Formal Semantics and Proof Techniques for Optimizing VHDL Models

  • Author(s) Kothanda Umamageswaran; Sheetanshu L. Pandey; Philip A. Wilsey
  • Publisher Published by Springer Copyright © 1999
  • "ISBN-13 9780792383758"
  • Format Fixed Layout

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Formal Semantics and Proof Techniques for Optimizing VHDL Models is written by Kothanda Umamageswaran; Sheetanshu L. Pandey; Philip A. Wilsey and published by Springer. The Digital and eTextbook ISBNs for Formal Semantics and Proof Techniques for Optimizing VHDL Models are 9781461551232, 1461551234 and the print ISBNs are 9780792383758, 0792383753. Save up to 80% versus print by going digital with VitalSource. Additional ISBNs for this eTextbook include 9781461373315.

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